The Open Cloud Testbed (OCT)
This project will construct and support a testbed for research and experimentation into new cloud platforms. This testbed combines proven software technologies with a real production cloud enhanced with Field Programmable Gate Arrays (FPGA) capabilities. This testbed will accelerate innovation in cloud technologies; technologies affecting almost all of computing today. In providing capabilities that today are only available to researchers within a few large commercial cloud providers, it will allow diverse communities to exploit these technologies, “democratizing” cloud computing research, and allowing increased collaboration between the research and open source communities. The community outreach activities of the project are targeted to researchers who explore complex distributed systems and cloud platforms, spanning a diverse range of backgrounds, institutions, and regions. The project will support educating the next generation of researchers in this field, and existing relationships with industrial partners of the affiliated production cloud will accelerate technology transfer from academic research to practical use.
PRATE: P4 Research enabled by Accelerators in national TestbEds
http://www.coe.neu.edu/Research/rcl/projects/prate/index.html
Scientific research is increasingly performed “in silico”, which means experimentation is performed by a computer instead of using traditional laboratories. Chemistry, Biology, and Physics are only a small set of examples of the science domains that heavily rely on scientific computing to make new discoveries. Many of the computational models these discoveries are based on need massive amounts of computational, networking, and storage resources. The goal of this project is to make a new type of processing unit –Field Programmable Gate Array (FPGA)– available to the research community to offer new and efficient ways of computation and data communication.
This collaborative project, which brings together researchers from Northeastern University and the University of Massachusetts Amherst, will provide tools and tutorials to allow network researchers to use the P4 programming language in network-attached FPGAs that are available in the FABRIC, Chameleon, CloudLab, and Open Cloud Testbed testbeds supported by NSF. Network-attached FPGAs support the disaggregation of resources such as memory, network and processing, and novel tools will be investigated to support this more general cloud processing model. Once established the tools provided by this project will enable innovative research into i) network security to ensure the security of systems where a user can generate arbitrary networking traffic; ii) in-network telemetry; iii) in-network processing; and areas not yet envisioned by the proposers.
Scientific computing has supported many discoveries in the past decade (e.g., gravitational waves, black holes, protein folding) and will lead to many more in the future, with many of them having broad societal impacts. This project will generate tools that will make the use of network and compute resources more efficient to better support scientific applications. P4 research projects will be developed as samples to be used by the broader community. In addition, the project will support two graduate students who will develop important skills in data center disaggregation and advanced networking. Tools and tutorials developed as part of this project will be used in data center and networking classes the principle investigators teach.
QuTiBench: Quantized Tiered Benchmarking for NNs on FPGAs
QuTiBench is a novel multi-tiered benchmarking methodology that helps system developers understand the benefits and limitations of the broad spectrum of novel compute architectures that emerge in the space of CNN inference.
VFLOAT: Variable Precision Floating Point Library
VFloat is a library of variable precision floating point units written in VHDL targeting FPGAs. Components include floating point arithmetic (add, sub, mul, div, sqrt, acc) and format conversion (fix2float and float2fix).
Floating Point Arithmetic for Heterogeneous Architectures
This research aims at tools and techniques to help programmers find “issues” with the use of floating-point arithmetic in parallel scientific code, specifically written using OpenCL. Specifically, the goal is to detect potential sources of reliability and portability deficiencies in such code that are due to dependencies of the floating-point behavior on the underlying (IEEE-compliant) architecture.
CRASH: Cognitive Radio Accelerated with Software and Hardware
CRASH creates a low latency, high performance Cognitive Radio platform that simplifies offloading algorithms to programmable logic. This research shows that heterogeneous computing systems, such as CRASH, can provide Cognitive Radios substantial processing gains without sacrificing programmability.