Hardware-Software Codesign of Wireless Transceivers on Zynq Heterogeneous Systems, B. Drozdenko, M. Zimmermann, T. Dao, K. Chowdhury, and M. Leeser. IEEE Transactions on Emerging Topics in Computing, Special Issue on Next Generation Wireless Computing Systems. https://doi.org/10.1109/TETC.2017.2651054
Open Source Variable Precision Floating Point Library for Major Commercial FPGAs, Xin Fang and Miriam Leeser. ACM Transactions on Reconfigurable Technology and Systems. vol. 9, no. 3, July 2016. http://dx.doi.org/10.1145/2851507.
High-Level System Design of IEEE 802.11b Standard-Compliant Link Layer for MATLAB- based SDR, R. Subramanian, B. Drozdenko, E. Doyle, R. Ahmed, M. Leeser, and K. R. Chowdhury, IEEE Access, vol. 4, pp. 1494 – 1509, 2016. https://doi.org/10.1109/ACCESS.2016.2553671
Validity and Reliability of Kinect Skeleton for Measuring Shoulder Joint Angles, Meghan Huber, Amee L. Seitz, Miriam Leeser and Dagmar Sternad. Physiotherapy. Vol. 101, No. 4, pp. 389-393. December, 2015. http://dx.doi.org/10.1016/j.physio.2015.02.002.
Kernel Specialization Provides Adaptable GPU Code for Particle Image Velocimetry, N. Moore, M. Leeser and L. Smith King. IEEE Trans. on Parallel and Distributed Systems. vol. 26, no. 4, pp. 1049-1058, April 2015. https://doi.org/10.1109/TPDS.2014.2317721.
Fast reconstruction of 3D volumes from 2D CT projection data with GPUs, Miriam Leeser, Saoni Mukherjee and James Brock. Biomed Central Research Notes 2014, 7:582. https://doi.org/10.1186/1756-0500-7-582.
Minimum Energy Analysis and Experimental Verification of a Latch-Based Subthreshold FPGA, P. J. Grossmann, M. E. Leeser, and M. Onabajo, IEEE Trans. on Circuits and Systems II: Express Briefs Vol. 59, no. 12, pp. 942 — 946, Dec. 2012. https://doi.org/10.1109/TCSII.2012.2231035.
The effect of temporal impulse response on experimental reduction of photon scatter in time-resolved diffuse optical tomography, Niksa Valim, James Brock, Miriam Leeser and Mark Niedre. Physics in Medicine and Biology. Vol. 58, No. 2, pp. 335-349, Dec. 2012. http://stacks.iop.org/0031-9155/58/i=2/a=335.
VForce: An Environment for Portable Applications on High Performance Systems with Accelerators, Nicholas Moore, Miriam Leeser and Laurie Smith King. Journal of Parallel and Distributed Computing, Elsevier. Vol. 72, No. 9, pp. 1144-1156, Sept. 2012. https://doi.org/10.1016/j.jpdc.2011.07.014.
The Challenges of Writing Portable, Correct and High Performance Libraries for GPUs, Miriam Leeser, Devon Yablonski, Dana Brooks, Laurie Smith King. ACM SIGARCH Computer Architecture News. Volume 39 Issue 4, pages 2-7, Sept. 2011. http://doi.acm.org/10.1145/2082156.2082158.
VFloat: A Variable Precision Fixed- and Floating-Point Library for Reconfigurable Hardware, Xiaojun Wang and Miriam Leeser. ACM Transactions on Reconfigurable Technology and Systems. Vol. 3 No. 3, September 2010. http://doi.acm.org/10.1145/1839480.1839486.
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic, Michaela Blott, Thomas B. PreuBer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O’Brien, Yaman Umuroglu, and Miriam Leeser. 35th International Conference on Computer Design (ICCD), Nov. 2017, pp. 419-422. https://doi.org/10.1109/ICCD.2017.73.
Accelerating big data applications using lightweight virtualization framework on enterprise cloud, Janki Bhimani, Zhengyu Yang, Miriam Leeser, and Ningfang Mi. 21st IEEE High Performance Extreme Computing (HPEC), Sept. 2017. https://doi.org/10.1109/HPEC.2017.8091086.
FPGA modeling techniques for detecting and demodulating multiple wireless protocols. , Benjamin Drozdenko, Suranga Handagala, Kaushik R. Chowdhury, and Miriam Leeser. 23rd International Conference on Field Programmable Logic and Applications (FPL), August, 2017. https://doi.org/10.23919/FPL.2017.8056822.
FIM: Performance Prediction for Parallel Computation in Iterative Data Processing Applications, Janki Bhimani, Ningfang Mi, Miriam Leeser and Zhengyu Yang. 10th IEEE International Conference on Cloud Computing (IEEE CLOUD 2017), June, 2017, pp. 359-366. https://doi.org/10.1109/CLOUD.2017.53.
Using High Level GPU Tasks to Explore Memory and Communications Options on Heterogeneous Platforms, Chao Liu, Janki Bhimani and Miriam Leeser. Software Engineering Methods for Parallel and High Performance Applications (SEM4HPC), June 2017. pp. 21-28. http://doi.acm.org/10.1145/3085158.3086160.
Secure Function Evaluation Using an FPGA Overlay Architecture, Xin Fang, Stratis Ioannidis, and Miriam Leeser. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. Feb. 2017. pp. 257-266. http://dl.acm.org/citation.cfm?id=3021746.
A Framework for Developing Parallel Applications with high level Tasks on Heterogeneous Platforms, Chao Liu and Miriam Leeser. 8th ACM International Workshop on Programming Models and Applications for Multicores and Manycores (PMAM). Feb. 2017. pp. 74-79. http://doi.acm.org/10.1145/3026937.3026946.
Performance Prediction Techniques for Scalable Large Data Processing in Distributed MPI Systems, Janki Bhimani, Ningfang Mi, Miriam Leeser and Zhengyu Yang. 35th IEEE International Performance Computing and Communications Conference (IPCCC). Dec 2016. https://doi.org/10.1109/PCCC.2016.7820608
Design space exploration of GPU Accelerated cluster systems for optimal data transfer using PCIe bus, Janki Bhimani, Miriam Leeser, Ningfang Mi. 20th IEEE High-Performance Extreme Computing Conference (HPEC). September 2016. https://doi.org/10.1109/HPEC.2016.7761614.
Unified and lightweight tasks and conduits: A high level parallel programming framework, Chao Liu and Miriam Leeser. 20th IEEE High-Performance Extreme Computing Conference (HPEC). September 2016. https://doi.org/10.1109/HPEC.2016.7761583.
Modeling Considerations for the Hardware-Software Co-design of Flexible Modern Wireless Transceivers, Benjamin Drozdenko, Matthew Zimmermann, Tuan Dao, Kaushik Chowdhury, and Miriam Leeser. 22nd International Conference on Field Programmable Logic and Applications (FPL), August 2016. https://doi.org/10.1109/FPL.2016.7577323.
State-action based Link Layer Design for IEEE 802.11b Compliant MATLAB-based SDR, R. Subramanian, E. Doyle, B. Drozdenko, M. Leeser and K. R. Chowdhury. IEEE Distributed Computing in Sensor Systems (DCOSS), May 2016. pp. 193-198. https://doi.org/10.1109/DCOSS.2016.34.
Cardiac MRI compressed sensing image reconstruction with a graphics processing unit, Majid Sabbagh, Martin Uecker, Andrew J. Powell, Miriam Leeser, and Mehdi H. Moghari. 10th International Symposium on Medical Information and Communication Technology (ISMICT), March 2016. https://doi.org/10.1109/ISMICT.2016.7498891.
Accelerating K-Means Clustering with Parallel Implementations and GPU computing, Janki Bhimani, Miriam Leeser, Ningfang Mi. 19th IEEE High-Performance Extreme Computing Conference (HPEC). September 2015. https://doi.org/10.1109/HPEC.2015.7322467.
GPU Implementation of Reverse Coordinate Conversion for Proteins, Mahsa Bayati, Jaydeep P. Bardhan, Miriam Leeser. 19th IEEE High-Performance Extreme Computing Conference (HPEC). September 2015. https://doi.org/10.1109/HPEC.2015.7322478.
Leakage Evaluation on Power Balance Countermeasure Against Side-Channel Attack on FPGAs, Xin Fang, Pei Luo, Yunsi Fei, and Miriam Leeser. 19th IEEE High-Performance Extreme Computing Conference (HPEC). September 2015. https://doi.org/10.1109/ASAP.2015.7245724.
Behavioral Non-portability in Scientific Numeric Computing, Y. Gu, T. Wahl, M. Bayati and M. Leeser. Euro-Par International Conference on Parallel and Distributed Computing, pp. 558 – 569, August 2015. https://doi.org/10.1007/978-3-662-48096-0_43.
Side-channel Analysis of MAC-Keccak Hardware Implementations, P. Luo, Y.Fei, X. Fang, A. Ding, D. Kaeli, and M. Leeser. Hardware and Architectural Support for Security and Privacy (HASP), June 2015. http://doi.acm.org/10.1145/2768566.2768567.
Implementing a MATLAB-based Self-Configurable Software-Defined Radio Transceiver, Benjamin Drozdenko, Ramanathan Subramanian, Kaushik Chowdhury, and Miriam Leeser. 10th International Conference on Cognitive Radio Oriented Wireless Networks (CROWNCOM). pp. 164-175. April, 2105. https://doi.org/10.1007/978-3-319-24540-9_13.
Power Analysis Attack on Hardware Implementation of MAC-Keccak on FPGAs, Pei Luo, Yunsi Fei, Xin Fang, A. Adam Ding, Miriam Leeser and David R. Kaeli. International Conference on ReConFigurable Computing and FPGAs. December 2014. https://doi.org/10.1109/ReConFig.2014.7032549.
Accelerating Protein Coordinate Conversion using GPUs, Mahsa Bayati, Jaydeep Bardhan, D. M. King and Miriam Leeser. 18th IEEE High-Performance Extreme Computing Conference (HPEC). September 2014. https://doi.org/10.1109/HPEC.2014.7040965.
Reducing Processing Latency with a Heterogeneous FPGA-Processor Framework, J. Pendlum, M. Leeser and K. Chowdhury. IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2014. https://doi.org/10.1109/FCCM.2014.13.
Make it real: Effective floating-point reasoning via exact arithmetic, Miriam Leeser, Saoni Mukherjee, Jaideep Ramachandran and ThomasWahl. Design, Automation & Test in Europe Conference (DATE), March 2014. https://doi.org/10.7873/DATE.2014.130.
FPGA-based Hyperspectral Covariance Coprocessor for Size, Weight, and Power, David Kusinsky and Miriam Leeser. 17th IEEE High-Performance Extreme Computing Conference (HPEC). September 2013. https://doi.org/10.1109/HPEC.2013.6670335.
Vendor Agnostic, High Performance, Double Precision Floating Point Division for FPGAs, Xin Fang and Miriam Leeser. 17th IEEE High-Performance Extreme Computing Conference (HPEC). September 2013. https://doi.org/10.1109/HPEC.2013.6670335.
Kernel Specialization for Improved Adaptability and Performance on Graphics Processing Units (GPUs), Nicholas Moore, Miriam Leeser and Laurie Smith King. 27th IEEE International Parallel & Distributed Processing Symposium (IPDPS), May 2013. https://doi.org/10.1109/IPDPS.2013.31.
Minimum Energy Operation for Clustered Island-Style FPGAs, Peter Grossmann, Miriam Leeser and Marvin Onabajo. 21st ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), February 2013. http://doi.acm.org/10.1145/2435264.2435293.
Characterization of a Single-Supply Subthreshold FPGA, Peter Grossmann, Miriam Leeser, and Marvin Onabajo. IEEE Subthreshold Microelectronics Conference. October 2012. https://doi-org.ezproxy.neu.edu/10.1109/SubVT.2012.6404319.
CUDA and OpenCL Implementations of 3D CT Reconstruction for Biomedical Imaging, Saoni Mukherjee, Nicholas Moore, James Brock and Miriam Leeser. 16th IEEE HighPerformance Extreme Computing Conference (HPEC). September 2012. https://doi.org/10.1109/HPEC.2012.6408674.
CRUSH: Cognitive Radio Universal Software Hardware, George Eichinger, Kaushik Chowdhury and Miriam Leeser. 22nd International Conference on Field Programmable Logic and Applications (FPL), August 2012. https://doi.org/10.1109/FPL.2012.6339237.
OpenCL Floating Point Software on Heterogeneous Architectures — Portable or Not?, Miriam Leeser, Jaideep Ramachandran, Thomas Wahl, and Devon Yablonski. 5th International Workshop on Numerical Software Verification (NSV). July 2012. http://www.ccs.neu.edu/home/wahl/Publications/lrwy12.pdf.
Heterogeneous Tasks and Conduits Framework for Rapid Application Portability and Deployment, J. Brock, M. Leeser and M. Niedre. Innovative Parallel Computing (InPar), May 2012. https://doi-org.ezproxy.neu.edu/10.1109/InPar.2012.6339588.
Incremental Clustering Applied to Radar Deinterleaving: A Parameterized FPGA Implementation, S. Bailie and M. Leeser. 20th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), February 2012. http://doi.acm.org/10.1145/2145694.2145699.
Adaptable Two-Dimension Sliding Windows on NVIDIA GPUs with Runtime Compilation, Nicholas Moore, Miriam Leeser and Laurie Smith King. Symposium on Application Accelerators in High Performance Computing (SAAHPC), pp. 103 — 112. July 2011. http://saahpc.ncsa.illinois.edu/11/. Winner, Best Paper Award.
An Autonomous Vector/Scalar Floating Point Coprocessor for FPGAs,” J. Kathiara and M. Leeser. IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM)}, pp. 33-36. May 2011. https://doi.org/10.1109/FCCM.2011.14.
Accelerating Algorithms on GPUs in SCIRun: the Conjugate Gradient Case Study, and D. Brooks. Symposium on Application Accelerators in High Performance Computing (SAAHPC)}, July 2010. http://saahpc.ncsa.illinois.edu/10/.
Efficient Template Matching with Variable Size Templates in CUDA,” N. Moore, M. Leeser and L. Smith King. IEEE Symposium on Application Specific Processors (SASP), pp. 77-80. June 2010. https://doi.org/10.1109/SASP.2010.5521142.
Chao Liu, Unified Tasks and Conduits for Programming on Heterogeneous Computing Platforms. December, 2017.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/cliu-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/cliu-phd2017.pdf
Xin Fang, Privacy Preserving Computations Accelerated using FPGA Overlays. August 2017.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/fang-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/fang-phd2017.pdf
Benjamin Drozdenko, Enabling Protocol Coexistence: Hardware-Software Codesign of Wireless Transceivers on Heterogeneous Computing Architectures. May 2017.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/drozdenko-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/drozdenko-phd2017.pdf
Peter Grossmann, Design and Analysis of Minimum Energy FPGAs. May 2013.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/grossmann-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/grossmann-phd2013.pdf
James Brock, An Environment to Support GPU and Multicore Programming for Rapid, High Performance, Application Deployment. August 2012.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/jbrock-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/jbrock-phd2012.pdf
Nicholas Moore, Kernel Specialization for Improved Adaptability and Performance on Graphics Processing Units (GPUs). June 2012.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/nmoore-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/nmoore-phd2012.pdf
Abderrahmane Bennis, Implementing a Highly Parameterized Digital PIV System on Reconfigurable Hardware. August 2010.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/bennis-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/bennis-phd2010.pdf
Xiaojun Wang, Variable Precision Floating-Point Divide and Square Root for Efficient FPGA Implementation of Image and Signal Processing Algorithms. December 2007.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/xjwang-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/xjwang-phd2007.pdf
Wang Chen, Acceleration of the 3D FDTD Algorithm in Fixed-point Arithmetic using Reconfigurable Hardware. August 2007.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/wchen-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/wchen-phd2007.pdf
Haiqian Yu, Optimizing Data Intensive Window-based Image Processing on Reconfigurable Hardware Boards. January 2007.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/hyu-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/hyu-phd2007.pdf
Heather Quinn, Runtime Tools for Hardware/Software Systems with Reconfigurable Hardware. August 2004.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/hquinn-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/hquinn-phd2004.pdf
Juan Carlos Rojas, Multimedia Macros for Portable Optimized Programs.” August 2003.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/rojas-phdabstract.txt
Dissertation: http://www.coe.neu.edu/Research/rcl/theses/rojas-phd2003.pdf
Kai Huang, K-means Parallelism on FPGA, December 2017.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/huang-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/huang-ms2017.pdf
Majid Sabbagh, Accelerating Cardiac MRI Compressed Sensing Image Reconstruction using Graphics Processing Units, April 2016.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/sabbagh-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/sabbagh-ms2016.pdf
Mahsa Bayati, Parallel Methods for Protein Coordinate Conversion, May 2015.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/bayati-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/bayati-ms2015.pdf
Jonathon Pendlum, CRASH: Cognitive Radio Accelerated with Software and Hardware, April 2014.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/pendlum-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/pendlum-ms2014.pdf
Xin Fang, Variable Precision Floating Point Reciprocal, Divider and Square Root for Major FPGA Vendors, July 2013.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/fang-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/fang-ms2013.pdf
David Kusinsky, FPGA-based Hyperspectral Covariance Coprocessor for Size, Weight, and Power Constrained Platforms, April 2013.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/kusinsky-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/kusinsky-ms2013.pdf
George Eichinger, CRUSH: Cognitive Radio Universal Software Hardware, April 2012.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/eichinger-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/eichinger-ms2012.pdf
Mary Ellen Tie, Accelerating Explicit State Model Checking on an FPGA: PHAST, February 2012.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/metie-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/metie-ms2012.pdf
Devon Yablonski, Numerical Accuracy Differences in CPU and GPGPU Codes, August 2011.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/yablonski-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/yablonski-ms2011.pdf
Jainik Kathiara, The Unified Floating Point Vector Co-processor for Reconfigurable Hardware, January 2011.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/kathiara-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/kathiara-ms2011.pdf
Scott Bailie, An FPGA Implementation of Incremental Clustering for Radar Pulse Deinterleaving, May 2010.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/bailie-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/bailie-ms2010.pdf
Sherman Braganza, Phase Unwrapping on Reconfigurable Hardware and Graphics Processors, August 2008.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/sbraganza-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/sbraganza-ms2008.pdf
Benjamin Cordes, Parallel Backprojection: A Case Study in High Performance Reconfigurable Computing, May 2008.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/bcordes-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/bcordes-ms2008.pdf
Nicholas Moore, Vforce: VSIPL++ for Reconfigurable Computing Environments, defended December 2007. Degree awarded 2011.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/nmoore-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/nmoore-ms2007.pdf
Albert A. Conti III, A Hardware/Software System for Adaptive Beamforming, January 2007.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/conti-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/conti-ms2007.pdf
Joshua Noseworthy, Enabling Communications Between an FPGA’s Embedded Processor and its Reconfigurable Resources, August 2005.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/noseworthy-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/noseworthy-ms2005.pdf
Shawn Miller, Enabling a Real-time Solution to Retinal Vascular Tracing Using FPGAs, April 2004.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/smiller-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/smiller-ms2004.pdf
Wang Chen, An FPGA Implementation of the 2D FDTD Algorithm, August 2003.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/wchen-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/wchen-ms2003.pdf
Haiqian Yu, Memory Architecture of Data Intensive Image Processing Algorithms in Reconfigurable Hardware, August 2003.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/hyu-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/hyu-ms2003.pdf
Michael Estlick, An FPGA Implementation of the K-Means Algorithm for Image Processing, September 2002.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/estlick-msabstract.txt
Srdjan Coric, Parallel-Beam Backprojection: an FPGA Implementation Optimized for Medical Imaging, September 2002.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/coric-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/coric-ms2002.pdf
Pavle Belanovic, Library of Parameterized Modules for Floating-Point Arithmetic with an Example Application, June 2002.
Abstract: http://www.coe.neu.edu/Research/rcl/theses/belanovic-msabstract.txt
Thesis: http://www.coe.neu.edu/Research/rcl/theses/belanovic-ms2002.pdf